Area of interest
Research articles in area DFT
Technical Articles in area DFT
Technical Presentations
Technical Articles
Books
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Area of interest
Research articles in area DFT
Technical Articles in area DFT
Technical Presentations
Technical Articles
Books
Description of area of interest in design for test (DFT) (Not updated since year 2000).
Title: An Almost c-testable BIST structure for NoC. Nordic Test Forum 2009 (NTF-09) [1-2, December].
Title: A Highly Scalable and (almost) c-testable BIST for NoC. Poster at PhD Forum in conjunction with DATE 2009 [24, April].
Title: Towards an almost c-testable NoC test strategy. 5th IEEE East-West Design & Test Symposium 2007 (EWDTS-07) [25-30, September].
Title: Towards a test vector independent test response analyser for NoCs. European Test Symposium 2007 (ETS07) [no PDF].
Title: Toward a Scalable Test Methodology for 2D-mesh Network-on-Chips. Design Automation And Test conference 2007 (DATE07) [PDF].
Title: Utilizing NoC switches as BIST-structures in 2D Mesh Network-on-Chip. Future Interconnects and Network on Chip Workshop 2006 (Held in conjunction with DATE06) [PDF].
Title: IEEE P1500, a Standard for System on Chip DFT. Nordic Test forum 2004 (NTF04) [PDF].
Title: IEEE P1500, Boundary Scan for SoCs. Swedish System-on-Chip Conference 2004 (SSoCC04) [PDF].
Title: Can commercial tools handle DFT of digital SoCs?. IEEE European Test Workshop 2001 (ETW01) [PDF].
Title: A DFT architecture for total BIST of mega-gate designs. IEEE European Test Workshop 1997 (ETW97) [PDF].
Title: ETP, the embedded core test processor. first Electronic Circuits and Systems conference 1997 (ECS97) [PDF].
Title: Embedded Test Processor (ETP) . Baltic Electronic Conference 1996 (BEC96) [PDF].
Title: Effektiv test av nätverk på chip (in swedish only, report addressing Kim's research studies). Elektronik i Norden No. 8, 11 May, 2007, pg 34.
Title: 100 procent fel kan vara acceptabelt (in swedish only, report from ETS'05). Elektronik i Norden No. 10-11, 17 June, 2005, pg 14-15.
Title: IP-blocken skall testa sig själva (in swedish only). Elektroniktidningen No. 8, 7 May, 2004, pg 15.
Title: Boundary Scan för SoC (in swedish only. Elektronik i Norden No. 7, 23 April, 2004, pg 25-29.
Title: Finn felen i tid (in swedish only, report from ITC'03). Elektronik i Norden No. 18, 14 November, 2003, pg 10-12.
Title: Funktionell test bättre än strukturell (in swedish only, report from ITC'02). Elektronik i Norden No. 17, 1 November, 2002, pg 21-22.
Title: Hur automatisk är DFT för SoC? (in swedish only). Elektronik i Norden No. 7, 19 April, 2002, pg 28-31.
Title: Testa SoC på fyra sekunder (in swedish only). Elektronik i Norden No. 5, 15 Mars, 2002, pg 40-43.
Title: DFT måste vara del av planeringen (in swedish only). Elektronik i Norden No. 5, 15 Mars, 2002, pg 44-46.
Title: Hur testa nästa generation av halvledarprocesser? (in swedish only, report from ITC'00). Elektronik i Norden No. 17, 3 November, 2000, pg 24-28.
Title: System på kisel kräver inbyggd självtestare (in swedish only). Elektronik i Norden No. 10, 2 June, 2000, pg 68-69.
Title: Enklare test av system på kisel (in swedish only). Elektronik i Norden No. 10, 2 June, 2000, pg 76.
Title: Gärna smarta system, men hur? (in swedish only, report from DATE'2000). Elektronik i Norden No. 8, 5 May, 2000, pg 30-33.
Title: SCAN-test är död, leve logik-BIST (in swedish only, report from ITC'99, part 2 of 2). Elektronik i Norden No. 19, 26 November, 1999, pg 26+28.
Title: Test måste bli billigare (in swedish only, report from ITC'99, part 1 of 2). Elektronik i Norden No. 18, 12 November, 1999, pg 26+28.
Title: Klarar dagens testmetoder morgondagens IC-kretsar? (in swedish only). Elektronik i Norden No. 13, 3 September, 1999, pg 52-55.
Title: Effektiv självtest av ROM-minnen (in swedish only). Elektronik i Norden No. 9, 14 May, 1999, pg 46-51.
Title: Dags för test av ASIC-kärnor? (in swedish only, report from ITC'98). Elektronik i Norden No. 1, January, 1999, pg 90-92.
Title: System-konstruktion och -test på ED&TC'97 (in swedish only, report from ED&TC'97). Elektronik i Norden No. 8, May, 1997, pg 30-32.
Title: Testa kretsar med 26 miljoner grindar (in swedish only, report from ITC'96). Elektronik i Norden No. 4, 1997, pg 18+20.
Title: Boundary scan - a promising method for testing complex electronic systems. ABB Review 7/8-1992, pg. 31-38
Title: Network-on-Chip (NoC) A Short "Tutorial". At company "OnTime Networks" 2007-01-15.
Title: NoC for Dummies. SNDFT-möte 2006-10-18.
Title: Network on Chip (NoC). Tallin Technical University 2005-11-29.
Title: Network on Chips (NoC), How to test in production? At company "RealFast" 2004-06-02.
Title: IEEE P1500 Standard Testability Method for Embedded Core-based Integrated Circuits. IPIS-conference 2004-04-21.
Title: IEEE P1500 differences and similarities with IEEE 1149.1. SNDFT-meeting 2004-02-11.
Title: IPs in Multi Microporcessor Mega gate SoC designs & Experiences and trends in DFT. IPIS-conference 2003-04-09.
Title: Test av komplexa system (in swedish only). EDA-conference 1997.
Title: Snart ser vi Google på chip (in swedish only, report from DATE'08). Elektronik i Norden No. 8, 16 May, 2008, pg 32-33.
Title: Hårdvaran blir oviktig (in swedish only, report from DATE'07). Elektronik i Norden No. 10, 8 June, 2007, pg 14-16.
Title: Slopa verifiering (in swedish only, report from DATE'04). Elektronik i Norden No. 4, 5 Mars, 2004, pg 10-11.
Title: Anpassa processorn efter koden (in swedish only). Elektronik i Norden No 20, 10 December, 1999, pg 56-57.
Technical Licentiate thesis. 12 june, 2003, 165 pages. Table of Contents Title: An Embedded Test Processor Architecture for Board- and Chip System Built-In Self Test.